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Snowflakes, Seashells and IBM's Future Chips

Snowflakes, Seashells and IBM's Future Chips

Airgap technology relies on a vacuum between the wires to keep data paths separated. Vacuum is a better insulator than carbon silicate, which becomes more fragile as chip components and circuits get smaller, the company said.

IBM is learning from naturally-forming patterns that create seashells, snowflakes and tooth enamel to build its next family of computer chips. The chips made with the new process will eventually be used in IBM's server product lines.

IBM said the "self-assembling nanontechnology," expected to be integrated into its chips in 2009, increases the flow of electrical signals by 35 percent while using 15 percent less power in comparison with traditional chip-building techniques.

The new process involves the use of "airgap" insulation for the millions of electrical paths, or ultra thin copper wires that make up each chip. Carbon silicate glass insulation is now used to keep the electrical signal in each path separated so data can be processed properly. Without proper insulation, the signals could become jumbled.

Airgap technology relies on a vacuum between the wires to keep data paths separated. Vacuum is a better insulator than carbon silicate, which becomes more fragile as chip components and circuits get smaller, the company said.

"This is the first time anyone has proven the ability to synthesize mass quantities of these self-assembled polymers and integrate them into an existing manufacturing process with great yield results," said Dan Edelstein, an IBM fellow and chief scientist of the self-assembly airgap project.

"By moving self-assembly from the lab to the fab, we are able to make chips that are smaller, faster and consume less power than existing materials and design architectures allow."

IBM researchers developed the airgap technique by studying the concepts behind self-assembling processes in nature. The new process uses a mix of chemical compounds that's poured onto a silicon wafer that already contains the wired chip patterns. That assembly is then baked. The result is a 300 millimetre-wide chip that has trillions of uniform holes, each about 20 nanometers in diameter. That's about five times smaller than is possible with the light-masking and chemical etching techniques now in use.

Once the holes are formed, carbon silicate glass is removed from the assembly, creating the airgap between the wires.

The technology is expected to provide the equivalent of two generations of Moore's Law performance improvements in a single step, according to IBM. Moore's Law, named for Gordon Moore, a co-founder of chip maker Intel, predicted in 1965 that the number of transistors on a chip would double every 24 months as part of the evolution of chip design and power.

"This doesn't change the face of computing immediately, but it does keep the door open so we can continue this trend of increasing scaling" in chip design, Edelstein said. "Ten years ago, we introduced copper" into chip design to replace aluminum, which was reaching its development plateau and threatening to stop the continued performance potential of chips, he said. "This is as big a thing."

Edelstein said the process came about through the merging of two separate scientific streams of thought. One group of scientists began several years ago to look at nature's self-assembly processes, while other researchers continued to look for ways to further shrink chip circuits, Edelstein said.

"It happened in a very common way - as in two heads are better than one and because necessity is the mother of invention," he said.

The challenge for researchers is finding new ways to speed up the transfer of signals, he said. As the wires on a chip are shrunk, they grow more resistant to the energy flowing through them, requiring higher amounts of electricity. That resistance comes largely from the ultra thin layers of carbon silicate glass used to insulate the wires. If the insulation is removed, electricity will flow better with little reduction in energy, Edelstein said.

The smallest wires in chips today are about 100nm in diameter, or about one-thousandth the thickness of a human hair.

A key difference between IBM's chip research and self-assembly techniques in nature is that the airgap process allows the creation of trillions of holes that are similar, while snowflakes and seashells vary from example to example.

Analysts say the new technique is important to the evolution of chip design. "All things considered, it's a pretty big deal, considering the kinds of problems it solves and how clever it is," said Dan Sokel, an analyst at US-based The Envisioneering Group. "Even [with] 15 percent [energy savings], every little bit helps."

The airgap technology "helps knock down the brick wall that says they can't make chips any smaller," Sokel said. "These... little things start to add up and in that regard, IBM gets a lot of points for very clever engineering."

David Lammers, an analyst and director of WeSRCH.com, a Web site owned by US-based chip consultancy VLSI Research, called the new process "a big innovation."

"As far as I know, I have never heard of anyone [using] self-assembly techniques previously in chip design. A better insulator between the wires will really help solve a problem."

The self-assembly process was jointly invented between IBM's US-based Almaden Research Centre and the US-based T.J. Watson Research Centre. Commercial research for the process was conducted at the College of Nanoscale Science and Engineering of the University in the US and at IBM's Semiconductor Research and Development Centre.

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