Everspin Technologies today announced what it is calling the industry's first Spin-Torque Magnetoresistive RAM (ST-MRAM) chip, which offers a non-volatile alternative to DRAM.
The new memory type has about 500 times the speed of NAND flash but the endurance of DRAM. ST-MRAM is seen by industry analysts as complementary technology to NAND flash memory, which is used to make solid-state drives (SSDs).
Everspin sees its ST-MRAM being used as buffer memory in SSDs, for I/O and network cache and as an ultra-fast tier of storage, as some DRAM manufacturers use their products today.
"Everspin is first out with this as far as I know, and we see lots of interest in ST-MRAM to be used in conjunction with NAND in data center storage applications," said Joseph Unsworth, research vice president at Gartner.
The 64Mbit chip is the first in Everspin's ST-MRAM roadmap. The company said it plans to scale to gigabit density memories with faster speeds. Everspin is shipping to system manufacturers samples of its first chip, the EMD3D064M 64Mb DDR3 ST-MRAM.
Everspin's ST-MRAM memory on a dual in-line memory module
Jeff Janukowicz, research director for solid-state storage at IDC, said memory technologies face significant challenges to deliver the right balance of performance, power consumption, and reliability as they scale to smaller process forms.
Due to lower market demand, DRAM prices have taken a hard tumble. Prices for the predominant 2Gb (gigabit) DDR3 DRAM die hit the $1 mark during the first quarter of 2012 and today it is selling for 82 cents.
Everspin's 64Mb ST-MRAM chip is functionally compatible with the industry standard JEDEC specification for the DDR3 interface, which delivers up to 1.6 billion transfers per second per I/O, translating to memory bandwidth of up to 3.2 GB/sec with nanosecond-class latency. The product is offered in an industry standard Window Ball Grid Array (WBGA) package-- the same as the DDR3 standard.
A 1Gbit MRAM chip would use 400 milliwatts of power, compared to a 64Gbit NAND flash chip, which uses 80 milliwatts of power, according to Everspin.
While suggested pricing for the new ST-MRAM chips was not released, Everspin said it is about 50 times more expensive than NAND flash, meaning it's not viable as a mass storage device. However, in terms of performance, ST-MRAM can produce 400,000 random write I/Os per second (IOPS) using 4K blocks compared to NAND flash with 800 random IOPS.
The EMD3D064 64Mb DDR3 ST-MRAM chip
Everspin said its 64Mb density MRAM chip provides an "ideal entry point for non-volatile buffer and cache memory in solid state and RAID storage systems as well as storage appliances." The 64Mb device will complement existing low-cost memory technologies, reducing overall system cost and complexity, it said.
"The commercialization of this technology is an important industry milestone that should continue to drive SSD proliferation in data center and in-memory computing architectures," Unsworth said.
One example of potential use for the new ST-MRAM chip is in cloud storage, where faster data access is required as more companies leverage service providers for big data stores.
Everspin's proprietary Spin-Torque technology uses a spin-polarized current for switching. Data is stored as a magnetic state versus an electronic charge, providing a non-volatile memory bit that does not suffer wear-out or data retention issues associated with NAND flash technology.
"We are collaborating with select customers to allow them to evaluate and take advantage of Spin-Torque MRAM technology sooner and to gather feedback that will help us finalize our 64Mb DDR3 ST-MRAM for production," Phil LoPresti, CEO of Everspin Technologies, said in a statement.
Everspin is manufacturing ST-MRAM on its 200 millimeter production line in Chandler, Ariz., and is collaborating with other manufacturers to establish 300mm MRAM tools and additional fab facilities.
The ST- MRAM chip will be generally available to system manufacturers in 2013. In addition, Everspin is offering ST-MRAM non-volatile random access memory modules in industry standard configurations. PCIe FPGA platforms are also available, allowing customers to start designs.
Lucas Mearian covers storage, disaster recovery and business continuity, financial services infrastructure and health care IT for Computerworld. Follow Lucas on Twitter at @lucasmearian or subscribe to Lucas's RSS feed. His e-mail address is email@example.com.
Read more about data storage in Computerworld's Data Storage Topic Center.
Join the CIO Australia group on LinkedIn. The group is open to CIOs, IT Directors, COOs, CTOs and senior IT managers.